Subscribe | Feedback   
Board Design
Embedded Software
Reference Design
FPGA/ASIC
Design and Verification
System Level Modeling
CDMS
IP Cores
IP will overtake EDA
Fabric technologies for AdvancedTCA: No king in
an agnostic world

GDA Experience with
Flash Disk Design
Spotlight: Multimedia i.Mx31
10 years of excellence: Message from the President and CEO
Awards
Affiliations
Events
Jobs
 
 
 
 
 
print 
IP business will overtake the EDA business
By Ravi Thummarukudy, VP & GM GDA Technologies Inc.
Last April and May I visited our design centers, customers and partners in Japan, India and Europe. I noticed a positive trend in the proliferation and adoption of standard based semiconductor- Intellectual Properties (IPs). This trend was accelerating the development of bigger, faster and more complex chips in the market place. While many things are known about the third party processors such as ARM, MIPS and foundation libraries from Artisan (now ARM) and Virage logic, I wish to focus on the standards-based IPs..


The current state of the third party IP business reminds me of the state of the third party EDA adoption in the late eighties. Working at Cadence I learnt first-hand how the standardization of the design languages in VERILOG and later VHDL enabled third party EDA tools to be adopted at bigger companies who originally had large CAD development teams. I was involved in several projects with companies such as Siemens, LSI Logic; NEC etc in an effort to promote standards- based simulation and synthesis tools.

A major complaint I faced at those times was from internal CAD teams that their tools are superior to third party tools, being better suited to their design process or methodology. While this was true in some cases, the economies of scale third party tool companies create like Cadence, Mentor and Synopsys overcame these initial objections. Having to depend on a third party to fix bugs or make enhancements is another issue that the big companies had to solve. Fast forwarding 15 years, today third party EDA tools are widely adopted and the chip and system companies have re-tooled their design methodologies to accommodate standard EDA tools.

A similar trend is emerging in the third party IP business where the standardization of design interfaces and the availability of re-useable blocks from quality IP suppliers replacing standard design blocks created internally. Every company wants to apply its scarce resources for building value-add components and building a standard block is no longer a value add. When the chip companies see that the IP guys are already spending time creating standard blocks and ensuring they are up- to- date, they started adopting the IPs for their use. Today if you look under the hood, you will see that every major chip out there has third party IP built in. Every major chip company in the world, Intel, Freescale, Qualcomm etc has adopted standards-based IP blocks built outside.

The third party IP industry started with interfaces like PCI and USB. These standards were defined by industry consortium and their compliance is strictly enforced through plug fests. The first two companies in this space, Virtual Chip and Sand micro systems, were in fact founded by Indian entrepreneurs. The success of these companies helped level the playing field where more fabless? companies came up in ASIA and Europe with chips that talk to other chips in the system through these standards licensed from third parties.

 
While PCI and USB blocks were the first wave, several new standards in the RTL based BUS interface IP s (RTL IP) such as PCI Express, HyperTransport , Serial Rapid IO, Ethernet, GPON, wireless standards like Bluetooth and WIMAX are becoming standardized and popular.
 
There is also a slew of algorithmic standards like MP3, MPEG1/2/4, H.264 etc. Yet another type of IP is the verification IPs (VIP) in Verilog, VERA or E language for verifying these standard components. Another category of IP s is physical or hard macro level IP blocks like Ethernet XAUI, PCIe/USB Phys.
 
Next