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| Practical Experience in Flash Memory Design |
| By
Dave Aiken
& Bhupender Saharan |
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Dave Aiken, Director of Sales at GDA, was recently a panelist at the Flash Memory Summit Session #201, Design Methods, held on Thursday August 10, 2006. He shared his thoughts on “Practical Experience in Flash Memory Design”, drawing numerous attendees to the discussion. The presentation was based on a paper he co-authored with Bhupender Saharan.
Bhupender Saharan is Manager Software Engineering at GDA. His team is involved in developing various key notch technologies like Flash Based disks, Secure IP Camera and VPN routers. |
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Introduction
Purpose
The purpose of this document is to describe the GDA Technologies Experience and Expertise on Flash based Disk Drives.
Scope of the project
Scope of the project is to explain the design technologies and algorithm used by GDA team for making a flash based disk drive
Definitions, acronyms, and abbreviations
Definition of special terms, acronyms, and abbreviations used in this doc is defined below for proper interpretation of it. |
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| Terms/ Abbreviations |
Definition |
| ATA |
AT Attachment |
| IDE |
Integrated Drive Electronics |
| MDMA |
Multi word Direct Memory Access |
| UDMA |
Ultra Direct Memory Access |
| PIO |
Programmed Input Output |
| FPGA |
Field Programmable Gate Arrays |
| LBA |
Logical Block Address |
| PBA |
Physical Block Address |
ATT
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Address Translation Table |
AB
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Allocation Block |
CBS
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Cache Block Size |
CPS
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Cache Page Size |
Sector
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512 byte unit |
Remote Host
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Host on IDE Bus |
| Local processor |
CPU on which firmware will run |
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PRACTICAL DESIGN EXPERIENCE
DA has lot of experience with various kinds of flash devices. Here are some examples: |
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- Developed Nand flash based IDE Disk
- Developed Nand flash based PCMCIA drive
- Interfaced Nand flashes and Nor flashes with various CPU's in various designs.
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Among all the above, flash based IDE Disk design was the most complex, and some of the details of this design are explained below,
Product perspective Diagram
A high level diagram of the IDE Flash Disk is shown in figure 1. |
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The main features of the FPGA based Flash Controller are |
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• Xilinx VirtexII FPGA based design to provide IDE Interface confirming to ATA-7 standards, ECC generation and data integrity checking.
• Multiple bank Flash controller logic to improve the performance of the Flash Interface
• Provides up to 32MB of SDRAM Cache for buffering the Flash data
• Local processor to implement following things: |
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• Logical Block to Physical block mapping
• Wear leveling
• Garbage collection
• Power management
• Data security
• Address Table Translation Creation and Maintenance |
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| • Flash Array |
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Next  |
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