These are the implementation platforms of choice for middle- to lower-volume and niche products. A number of our partners also take this path to mitigate their design and verification risks by early prototyping and validation of their high volume ASIC designs. These platforms provide faster turn around time for producing compared to an ASIC. Irrespective of rationales, this is a route many of our partners have taken to their great advantage.

The GDA team can assist you with the following:

Structured ASICs open up new integration opportunities for designers previously constrained by the resources and performance of FPGAs and the required ROI of standard cell ASIC projects.

Our Structured ASICs design capability provides designers with a faster time to market, reduction in engineering costs, and ASIC-like density and performance. Structured ASICs are based on cost-effective, high-function, easy-to-design ASIC architecture and ideal for designs requiring high system clock speeds with relatively lower production volumes often targeting niche and early reference solutions. Simply put, structured ASICs combine the high performance and density found in leading cell-based ASICs with a remarkably easy design flow.

GDA has a strong execution partnership with NEC ISSP and LSI Logic Rapid Chip to support our partners choosing the appropriate platform.

We can bring you these advantages: