GDA's SDRAM
controller core is a fully synchronous, highly
modular, and highly configurable design targeted
for a wide range of applications and technologies
.
The application dependent front end is implemented
as separate module with clearly defined interface
to the rest of the design. This enables quick
customizing of the core for different designs.
The application interface to the controller
provides a completely de-coupled request and
data transfer mechanisms to allow very high
data bandwidth.
The interface supports a configurable number
of agents, which can vary from 1 to 8. The controller
architecture enables pipelining of multiple
requests to improve overall memory access bandwidth.
The front-end interface is simple and timing
friendly that enables easy integration of the
core through on-chip buses or point-to-point
connections.