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FFT/IFFT IP *
GDA's CFFT core can either be implemented as a stand-alone component for real-time data or can be interfaced to the system bus. Bus interfacing requires the inclusion of the VCI Bus Controller Unit to the CFFT core. In a stand-alone environment, the CFFT core operates on the real-time input data. When configured for real-time input and bus- interfaced output, the VCI Bus Output controller is included. To provide the system designer with maximum flexibility of I/O interface and memory architecture, no data storage has been included in the core. The designer must supply the data memory as an external component. The core supplies a number of control signals that permits simple interfacing to several banks of on-chip RAM.


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* - Generally sold with GDA services only

      Features


  • High performance (up to 1024-point) pipelined complex FFT and inverse FFT (IFFT)
  • Fixed-point and Floating-point configurable implementation
  • FFT/IFFT selectable via pin in real-time mode of operation and using software configurable registers when bus interfaced
  • Parameterized for data width w, and address bus width, add_w
  • Naturally ordered input and output data
  • Support for pipelined data input, transform calculations and data output operations
  • When interfaced to a system bus, the read and write transactions between the core and the system uses the PVCI handshake protocol
  • Supports real-time input and output interface
  • Facilitates interrupt driven data transfer at the input and output