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TEJAS – TX - Display Port Transmitter
Overview

* Highly Configurable
* Technology Independent

GDA’s Display Port transmitter Core (TEJAS-TX) is a highly configurable design targeting Transmitter for new models of Flat Panel displays, Projectors, PCs and CE devices.

The Display Port controller’s Architecture is independent of Application logic, Implementation tools and target technology. GDA Solution easily allows Licensees to migrate among FPGA, Gate Array and standard cell technologies optimally. GDA Solution provides highly scaleable bandwidth through configurable number of lanes and bit rates per lane


GDA’s Display Port solution leverages years of experience in high speed digital I/O technologies like PCI-Express, Hyper Transport and expertise in creating system validated IP solution with RTL, Synthesis, Simulation, Board and software elements to offer lowest risk in terms of compliance and inter operability.

Specifications

Configurable Options

* Number of Lanes 1/2/4
* Bit Rate – 2.7Gbps/1.62Gbps per Lane
* Internal Data Width – 128/64/32
* Inclusion of Audio Stream support
* Inclusion of HDCP 1.3
* Inclusion of Scrambler
* Inclusion of 8b10b Encoder

Design Attributes

* Highly Modular and Configurable Design
* Fully Synchronous Design
* Clearly Demarked Clock Domains
* Error Insertions for Debug
* Software Control for AUX-CH Access

Product Package

* RTL Code
* System Verilog based Verification Environment
* Test Cases
* Protocol Checkers, Monitors
* Configurable Synthesis Shell

Documentation

* Data Sheet
* User manual
* Verification guide
* Synthesis guide

Availability : Contact ip@gdatech.com
Language : Verilog Synthesis : Synospys/Synplicity Simulation : NCVerilog Technology : FPGA, 90nm ASIC or better

*PCI Express is a registered trademark of the PCI-SIG. GDA IP; Sold under GDA’s Re-seller agreement with Rambus, Inc.



Features

  Compliant to VESA Display Port
    standardV1.1a

   Implements Link Layer

   Supports 1/2/4 Lanes
  Supports 2.7 Gbps/1.62Gbps bit rates per Lane

   Supports RGB, YCbCr Colorimetric Formats
  Supports CEA 861-C Infoframes

  Supports DPCD/EDID/MCCS
  Supports 32 bit PBUS Interface for Register Access

  Supports Mapping of I2C transactions over Aux-Channel
  Optionally Supports- Scrambler, Encoder

  Optionally Supports HDCP 1.3 Encryption
  Optionally Supports Audio Stream