The Client
A company in Silicon Valley specializing in solving verification problems for system level design and large ASIC design, as well as System-on-Chip (SoC) and IP based design.
The Project
The objective was to implement a non-standard DDR SD RAM Controller on FPGA and complete the RTL design and FPGA implementation within a very fast time frame to speed time to market. The other features were required due to:
- High performance frequency
- New FPGA from Xilinx - VERTEX IV
The Challenge
We needed to focus on ways to manage changes in customer requirements, as the specs were changed in between as the result of ongoing discussions throughout the process. We had to work hard to incorporate various changes required by the customer while still meeting the deadline.
The Solution
GDA's core team of engineers worked on the project for 3 months straight and met the customer deadline. We analyzed the specifications and proposed architecture to meet the requirements. To achieve these results, the customer would have had to go to the trouble of hiring an array of specialists themselves. GDA and our expertise provided a one-stop solution to them. The risk was GDA's; the customer had no liability.
Key Features
- RTL Design, verification
- Synthesis and timing closure
- High throughput to memory, PCI compliance solution , complete board, FPGA, and software solutions was provided to the customer
- Very positive working relationship with the customer, GDA engineers very responsive to the customer requirements
The benefit
To implement this design in such a short time, we used existing blocks as a foundation. As a result of this, we were able to quickly develop new blocks, which we can now use to leverage new customer projects and reduce their cost. |